Path:OKDatasheet > Datasheet Semiconductor > Fairchild Datasheet > DM74S112N
DM74S112N especificación: Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs
Path:OKDatasheet > Datasheet Semiconductor > Fairchild Datasheet > DM74S112N
DM74S112N especificación: Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs
Fabricante : Fairchild
Embalaje : MDIP
Pins : 16
Temperatura : Min 0 °C | Max 0 °C
Tamaño : 47 KB
Aplicación : Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs