HC2509C especificación: Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM

HC2509C similares

HC2509C
- Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM
HC2510C
- Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM

HC2509C Datasheet y Espec

Fabricante : Hyundai

Embalaje : TSSOP

Pins : 24

Temperatura : Min 0 °C | Max 85 °C

Tamaño : 92 KB

Aplicación : Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM