Path:OKDatasheet > Datasheet Semiconductor > Integral Datasheet > IN74HC112N
IN74HC112N especificación: Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS
Path:OKDatasheet > Datasheet Semiconductor > Integral Datasheet > IN74HC112N
IN74HC112N especificación: Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS
Fabricante : Integral
Embalaje : Plastic DIP
Pins : 16
Temperatura : Min -55 °C | Max 125 °C
Tamaño : 111 KB
Aplicación : Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS