Path:OKDatasheet > Datasheet Semiconductor > Lattice Datasheet > M5-512/184-12HI
M5-512/184-12HI especificación: 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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M5-512/184-12HI Datasheet y Espec
Fabricante : Lattice
Embalaje : PQFP
Pins : 100
Temperatura : Min -40 °C | Max 85 °C
Tamaño : 1126 KB
Aplicación : 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5-512/184-12HI PDF Download