MACHLV210-15JC especificación: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns

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MACHLV210-15JC Datasheet y Espec

Fabricante : Lattice

Embalaje : PLCC

Pins : 44

Temperatura : Min 0 °C | Max 70 °C

Tamaño : 243 KB

Aplicación : High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns