Path:OKDatasheet > Datasheet Semiconductor > TI Datasheet > CD74HC107M
CD74HC107M especificación: HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET
CD74HC107M similares
- CD74AC00E
- QUAD 2-INPUT NAND GATES
- CD74AC00M
- QUAD 2-INPUT NAND GATES
- CD74AC00M96
- QUAD 2-INPUT NAND GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
- CD74AC02M
- QUAD 2-INPUT NOR GATES
- CD74AC02M96
- QUAD 2-INPUT NOR GATES
CD74HC107M Datasheet y Espec
Fabricante : TI
Embalaje :
Pins : 14
Temperatura : Min -55 °C | Max 125 °C
Tamaño : 61 KB
Aplicación : HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESET
CD74HC107M PDF Download
