Path:OKDatasheet > Datasheet Semiconductor > TI Datasheet > CD74HCT109M
CD74HCT109M especificación: HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET
CD74HCT109M similares
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- QUAD 2-INPUT NAND GATES
- CD74AC00M
- QUAD 2-INPUT NAND GATES
- CD74AC00M96
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- QUAD 2-INPUT NOR GATES
- CD74AC02E
- QUAD 2-INPUT NOR GATES
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CD74HCT109M Datasheet y Espec
Fabricante : TI
Embalaje :
Pins : 16
Temperatura : Min -55 °C | Max 125 °C
Tamaño : 63 KB
Aplicación : HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET
CD74HCT109M PDF Download
