Path:OKDatasheet > Datasheet Semiconductor > Lattice Datasheet > M5LV-128/68-12YC
M5LV-128/68-12YC especificación: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path:OKDatasheet > Datasheet Semiconductor > Lattice Datasheet > M5LV-128/68-12YC
M5LV-128/68-12YC especificación: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Fabricante : Lattice
Embalaje : PQFP
Pins : 100
Temperatura : Min 0 °C | Max 70 °C
Tamaño : 1126 KB
Aplicación : 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)