Path:OKDatasheet > Datasheet Semiconductor > Lattice Datasheet > M5LV-320/120-20YI
M5LV-320/120-20YI especificación: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path:OKDatasheet > Datasheet Semiconductor > Lattice Datasheet > M5LV-320/120-20YI
M5LV-320/120-20YI especificación: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Fabricante : Lattice
Embalaje : PQFP
Pins : 100
Temperatura : Min -40 °C | Max 85 °C
Tamaño : 1126 KB
Aplicación : 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)