Path:OKDatasheet > Datasheet Semiconductor > TI Datasheet > SN74LVC112ADBR
SN74LVC112ADBR especificación: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Path:OKDatasheet > Datasheet Semiconductor > TI Datasheet > SN74LVC112ADBR
SN74LVC112ADBR especificación: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Fabricante : TI
Embalaje : DB
Pins : 16
Temperatura : Min -40 °C | Max 85 °C
Tamaño : 140 KB
Aplicación : DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET